<?xml version="1.0" encoding="UTF-8" standalone="no"?><dcc><dccFileName>01029700.dcc</dccFileName><revisionMajor>4</revisionMajor><revisionMinor>1</revisionMinor><modifiedAtWorkstation>3CNL12385</modifiedAtWorkstation><modifiedBy>micyao</modifiedBy><modifiedTime>2012/06/14 12:18:55.832</modifiedTime><creatorToolInternalRevision>120614121855832</creatorToolInternalRevision><creatorRepositoryFileName>C:\My-Document\DCC\.repository\01029700\120614121855832-120614121852946-3CNL12385-micyao.dcc</creatorRepositoryFileName><approved>true</approved><pqChecked>false</pqChecked><hwChecked>false</hwChecked><comments><Nips03ModeId_0 index="0">Manufacture register</Nips03ModeId_0><Nips03ModeId_0 index="1"/><Nips03ModeId_0 index="2"/><Nips03ModeId_0 index="3"/><Nips03ModeId_0 index="4"/><Nips03ModeId_0 index="5"/><Nips03ModeId_0 index="6"/><Nips03ModeId_0 index="7"/><Nips03ModeId_0 index="8"/><Nips03ModeId_0 index="9"/><Nips03ModeId_0 index="10"/><Nips03ModeId_0 index="11"/><Nips03ModeId_0 index="12"/><Nips03ModeId_0 index="13"/><Nips03ModeId_0 index="14"/><Nips03ModeId_0 index="15"/><Nips03ModeId_0 index="16"/><Nips03ModeId_0 index="17"/><Nips03ModeId_0 index="18"/><Nips03ModeId_0 index="19"/><Nips03ModeId_0 index="20"/><Nips03ModeId_0 index="21"/><Nips03ModeId_0 index="22"/><Nips03ModeId_0 index="23"/><Nips03ModeId_0 index="24"/><Nips03ModeId_0 index="25"/><Nips03ModeId_0 index="26"/><Nips03ModeId_0 index="27"/><Nips03ModeId_0 index="28"/><Nips03ModeId_0 index="29"/><Nips03ModeId_0 index="30"/><Nips03ModeId_0 index="31"/><Nips03ModeId_0 index="32"/><Nips03ModeId_0 index="33"/><Nips03ModeId_0 index="34"/><Nips03ModeId_0 index="35"/><Nips03ModeId_0 index="36"/><Nips03ModeId_0 index="37"/><Nips03ModeId_0 index="38"/><Nips03ModeId_0 index="39"/><Nips03ModeId_0 index="40"/><Nips03ModeId_0 index="41"/><Nips03ModeId_0 index="42"/><Nips03ModeId_0 index="43"/><Nips03ModeId_0 index="44"/><Nips03ModeId_0 index="45"/><Nips03ModeId_0 index="46"/><Nips03ModeId_0 index="47"/><Nips03ModeId_0 index="48"/><Nips03ModeId_0 index="49"/><Nips03ModeId_0 index="50"/><Nips03ModeId_0 index="51"/><Nips03ModeId_0 index="52"/><Nips03ModeId_0 index="53"/><Nips03ModeId_0 index="54"/><Nips03ModeId_0 index="55"/><Nips03ModeId_0 index="56"/><Nips03ModeId_0 index="57"/><Nips03ModeId_0 index="58"/><Nips03ModeId_0 index="59"/><Nips03ModeId_0 index="60"/><Nips03ModeId_0 index="61"/><Nips03ModeId_0 index="62"/><Nips03ModeId_0 index="63"/><Nips03ModeId_0 index="64"/><Nips03ModeId_0 index="65"/><Nips03ModeId_0 index="66"/><Nips03ModeId_0 index="67"/><Nips03ModeId_0 index="68"/><Nips03ModeId_0 index="69"/><Nips03ModeId_0 index="70"/><Nips03ModeId_0 index="71"/><Nips03ModeId_0 index="72"/><Nips03ModeId_0 index="73"/><Nips03ModeId_0 index="74"/><Nips03ModeId_0 index="75"/><Nips03ModeId_0 index="76"/><Nips03ModeId_5 index="0">fine_integration_time_min high</Nips03ModeId_5><Nips03ModeId_5 index="1">fine_integration_time_min low</Nips03ModeId_5><Nips03ModeId_5 index="2">fine_integration_time_max_margin high</Nips03ModeId_5><Nips03ModeId_5 index="3">fine_integration_time_max_margin low</Nips03ModeId_5><Nips03ModeId_5 index="4"/><Nips03ModeId_1 index="0">inbuild LSC, 0-disable, 1-enable</Nips03ModeId_1><Nips03ModeId_1 index="1">couplet correction, 0-disable,1-enable</Nips03ModeId_1><Nips03ModeId_1 index="2">single defect correction, 0-disable,1-enable</Nips03ModeId_1><Nips03ModeId_1 index="3"/><Nips03ModeId_2 index="0">inbuild LSC, 0-disable, 1-enable</Nips03ModeId_2><Nips03ModeId_2 index="1">couplet correction, 0-disable,1-enable</Nips03ModeId_2><Nips03ModeId_2 index="2">single defect correction, 0-disable,1-enable</Nips03ModeId_2><Nips03ModeId_2 index="3"/><Nips03ModeId_4 index="0">inbuild LSC, 0-disable, 1-enable</Nips03ModeId_4><Nips03ModeId_4 index="1">couplet correction, 0-disable,1-enable</Nips03ModeId_4><Nips03ModeId_4 index="2">single defect correction, 0-disable,1-enable</Nips03ModeId_4><Nips03ModeId_4 index="3"/><Nips03ModeId_9 index="0">inbuild LSC, 0-disable, 1-enable</Nips03ModeId_9><Nips03ModeId_9 index="1">couplet correction, 0-disable,1-enable</Nips03ModeId_9><Nips03ModeId_9 index="2">single defect correction, 0-disable,1-enable</Nips03ModeId_9><Nips03ModeId_9 index="3"/><general>Jun.14.2012 YWM: update PT DCC for ST Merlin to 004.001, change fin_integration_time_max_margin low to da
Jun.14.2012 YWM: update PT DCC for ST Merlin to 003.001, change patch for DPC, enable inbuild shading in VF, remove 361f-DPC enable gain level
Jun.6.2012 YWM: PT DCC for ST Merlin
5.18.2012 Zhang Mark create a new DCC for 1.3M ST Merlin</general></comments><fieldNames/><fieldTypes/><locks/></dcc>