<?xml version="1.0" encoding="UTF-8" standalone="no"?><dcc><dccFileName>01029703.dcc</dccFileName><revisionMajor>8</revisionMajor><revisionMinor>13</revisionMinor><modifiedAtWorkstation>3CNL12385</modifiedAtWorkstation><modifiedBy>micyao</modifiedBy><modifiedTime>2012/11/30 12:11:44.938</modifiedTime><creatorToolInternalRevision>121130121144938</creatorToolInternalRevision><creatorRepositoryFileName>C:\My-Document\DCC\.repository\01029703\121130121144938-121130111956520-3CNL12385-micyao.dcc</creatorRepositoryFileName><approved>true</approved><pqChecked>true</pqChecked><hwChecked>true</hwChecked><comments><Nips03ModeId_0 index="0">Optimised Voltage reference for pixel</Nips03ModeId_0><Nips03ModeId_0 index="1"/><Nips03ModeId_0 index="2"/><Nips03ModeId_0 index="3"/><Nips03ModeId_0 index="4"/><Nips03ModeId_0 index="5"/><Nips03ModeId_0 index="6"/><Nips03ModeId_0 index="7"/><Nips03ModeId_0 index="8"/><Nips03ModeId_0 index="9"/><Nips03ModeId_0 index="10"/><Nips03ModeId_0 index="11"/><Nips03ModeId_0 index="12"/><Nips03ModeId_0 index="13"/><Nips03ModeId_0 index="14"/><Nips03ModeId_0 index="15"/><Nips03ModeId_0 index="16"/><Nips03ModeId_0 index="17"/><Nips03ModeId_0 index="18"/><Nips03ModeId_0 index="19"/><Nips03ModeId_0 index="20"/><Nips03ModeId_0 index="21"/><Nips03ModeId_0 index="22"/><Nips03ModeId_0 index="23"/><Nips03ModeId_0 index="24"/><Nips03ModeId_0 index="25"/><Nips03ModeId_0 index="26"/><Nips03ModeId_0 index="27"/><Nips03ModeId_0 index="28"/><Nips03ModeId_0 index="29"/><Nips03ModeId_0 index="30"/><Nips03ModeId_0 index="31"/><Nips03ModeId_0 index="32"/><Nips03ModeId_0 index="33"/><Nips03ModeId_0 index="34"/><Nips03ModeId_0 index="35"/><Nips03ModeId_0 index="36"/><Nips03ModeId_0 index="37"/><Nips03ModeId_0 index="38"/><Nips03ModeId_0 index="39"/><Nips03ModeId_5 index="0"/><Nips03ModeId_5 index="1"/><Nips03ModeId_5 index="2"/><Nips03ModeId_5 index="3"/><Nips03ModeId_5 index="4"/><Nips03ModeId_1 index="0">Inbuild LSC on</Nips03ModeId_1><Nips03ModeId_1 index="1">Bruce Filter on</Nips03ModeId_1><Nips03ModeId_1 index="2"/><Nips03ModeId_1 index="3">Median Filter ON/OFF threshold</Nips03ModeId_1><Nips03ModeId_1 index="4">Median Filter ON/OFF threshold</Nips03ModeId_1><Nips03ModeId_1 index="5"/><Nips03ModeId_2 index="0">Inbuild LSC on</Nips03ModeId_2><Nips03ModeId_2 index="1">Bruce Filter on</Nips03ModeId_2><Nips03ModeId_2 index="2"/><Nips03ModeId_2 index="3">Median Filter ON/OFF threshold</Nips03ModeId_2><Nips03ModeId_2 index="4">Median Filter ON/OFF threshold</Nips03ModeId_2><Nips03ModeId_2 index="5"/><Nips03ModeId_4 index="0">Inbuild LSC on</Nips03ModeId_4><Nips03ModeId_4 index="1">Bruce filter on</Nips03ModeId_4><Nips03ModeId_4 index="2"/><Nips03ModeId_4 index="3">Median Filter OFF </Nips03ModeId_4><Nips03ModeId_4 index="4">Median Filter OFF </Nips03ModeId_4><Nips03ModeId_4 index="5"/><Nips03ModeId_9 index="0">Inbuild LSC off</Nips03ModeId_9><Nips03ModeId_9 index="1">Bruce filter on</Nips03ModeId_9><Nips03ModeId_9 index="2"/><Nips03ModeId_9 index="3">Median Filter OFF </Nips03ModeId_9><Nips03ModeId_9 index="4">Median Filter OFF </Nips03ModeId_9><Nips03ModeId_9 index="5"/><general>YaoWenmin 2012.Nov.30: ST Merlin Final IQ DCC 008.013
YaoWenmin 2012.Nov.05: ST Merlin Candidate IQ DCC 008.012</general></comments><fieldNames/><fieldTypes/><locks/></dcc>